Module attiny_hal::pac::ac::didr0

Digital Input Disable Register 0

Structs

• DIDR0_SPEC
  Digital Input Disable Register 0
• R
  Register DIDR0 reader
• W
  Register DIDR0 writer

Type Aliases

• AIN0D_R
  Field AIN0D reader - AIN0 Digital Input Disable
• AIN0D_W
  Field AIN0D writer - AIN0 Digital Input Disable
• AIN1D_R
  Field AIN1D reader - AIN1 Digital Input Disable
• AIN1D_W
  Field AIN1D writer - AIN1 Digital Input Disable