avr_device/devices/attiny85/adc/
didr0.rs

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1#[doc = "Register `DIDR0` reader"]
2pub struct R(crate::R<DIDR0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DIDR0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DIDR0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DIDR0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DIDR0` writer"]
17pub struct W(crate::W<DIDR0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DIDR0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DIDR0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DIDR0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADC1D` reader - ADC1 Digital input Disable"]
38pub type ADC1D_R = crate::BitReader<bool>;
39#[doc = "Field `ADC1D` writer - ADC1 Digital input Disable"]
40pub type ADC1D_W<'a, const O: u8> = crate::BitWriter<'a, u8, DIDR0_SPEC, bool, O>;
41#[doc = "Field `ADC3D` reader - ADC3 Digital input Disable"]
42pub type ADC3D_R = crate::BitReader<bool>;
43#[doc = "Field `ADC3D` writer - ADC3 Digital input Disable"]
44pub type ADC3D_W<'a, const O: u8> = crate::BitWriter<'a, u8, DIDR0_SPEC, bool, O>;
45#[doc = "Field `ADC2D` reader - ADC2 Digital input Disable"]
46pub type ADC2D_R = crate::BitReader<bool>;
47#[doc = "Field `ADC2D` writer - ADC2 Digital input Disable"]
48pub type ADC2D_W<'a, const O: u8> = crate::BitWriter<'a, u8, DIDR0_SPEC, bool, O>;
49#[doc = "Field `ADC0D` reader - ADC0 Digital input Disable"]
50pub type ADC0D_R = crate::BitReader<bool>;
51#[doc = "Field `ADC0D` writer - ADC0 Digital input Disable"]
52pub type ADC0D_W<'a, const O: u8> = crate::BitWriter<'a, u8, DIDR0_SPEC, bool, O>;
53impl R {
54    #[doc = "Bit 2 - ADC1 Digital input Disable"]
55    #[inline(always)]
56    pub fn adc1d(&self) -> ADC1D_R {
57        ADC1D_R::new(((self.bits >> 2) & 1) != 0)
58    }
59    #[doc = "Bit 3 - ADC3 Digital input Disable"]
60    #[inline(always)]
61    pub fn adc3d(&self) -> ADC3D_R {
62        ADC3D_R::new(((self.bits >> 3) & 1) != 0)
63    }
64    #[doc = "Bit 4 - ADC2 Digital input Disable"]
65    #[inline(always)]
66    pub fn adc2d(&self) -> ADC2D_R {
67        ADC2D_R::new(((self.bits >> 4) & 1) != 0)
68    }
69    #[doc = "Bit 5 - ADC0 Digital input Disable"]
70    #[inline(always)]
71    pub fn adc0d(&self) -> ADC0D_R {
72        ADC0D_R::new(((self.bits >> 5) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bit 2 - ADC1 Digital input Disable"]
77    #[inline(always)]
78    #[must_use]
79    pub fn adc1d(&mut self) -> ADC1D_W<2> {
80        ADC1D_W::new(self)
81    }
82    #[doc = "Bit 3 - ADC3 Digital input Disable"]
83    #[inline(always)]
84    #[must_use]
85    pub fn adc3d(&mut self) -> ADC3D_W<3> {
86        ADC3D_W::new(self)
87    }
88    #[doc = "Bit 4 - ADC2 Digital input Disable"]
89    #[inline(always)]
90    #[must_use]
91    pub fn adc2d(&mut self) -> ADC2D_W<4> {
92        ADC2D_W::new(self)
93    }
94    #[doc = "Bit 5 - ADC0 Digital input Disable"]
95    #[inline(always)]
96    #[must_use]
97    pub fn adc0d(&mut self) -> ADC0D_W<5> {
98        ADC0D_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "Digital Input Disable Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [didr0](index.html) module"]
108pub struct DIDR0_SPEC;
109impl crate::RegisterSpec for DIDR0_SPEC {
110    type Ux = u8;
111}
112#[doc = "`read()` method returns [didr0::R](R) reader structure"]
113impl crate::Readable for DIDR0_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [didr0::W](W) writer structure"]
117impl crate::Writable for DIDR0_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets DIDR0 to value 0"]
123impl crate::Resettable for DIDR0_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
avr_device/devices/attiny85/adc/didr0.rs

avr_device/devices/attiny85/adc/
didr0.rs
