Module attiny_hal::pac::cpu

CPU Registers

Modules

• clkpr
  Clock Prescale Register
• dwdr
  debugWire data register
• gpior0
  General purpose register 0
• gpior1
  General Purpose register 1
• gpior2
  General Purpose IO register 2
• mcucr
  MCU Control Register
• mcusr
  MCU Status register
• osccal
  Oscillator Calibration Register
• pllcsr
  PLL Control and status register
• prr
  Power Reduction Register

Structs

• RegisterBlock
  Register block

Type Aliases

• CLKPR
  CLKPR (rw) register accessor: an alias for Reg<CLKPR_SPEC>
• DWDR
  DWDR (rw) register accessor: an alias for Reg<DWDR_SPEC>
• GPIOR0
  GPIOR0 (rw) register accessor: an alias for Reg<GPIOR0_SPEC>
• GPIOR1
  GPIOR1 (rw) register accessor: an alias for Reg<GPIOR1_SPEC>
• GPIOR2
  GPIOR2 (rw) register accessor: an alias for Reg<GPIOR2_SPEC>
• MCUCR
  MCUCR (rw) register accessor: an alias for Reg<MCUCR_SPEC>
• MCUSR
  MCUSR (rw) register accessor: an alias for Reg<MCUSR_SPEC>
• OSCCAL
  OSCCAL (rw) register accessor: an alias for Reg<OSCCAL_SPEC>
• PLLCSR
  PLLCSR (rw) register accessor: an alias for Reg<PLLCSR_SPEC>
• PRR
  PRR (rw) register accessor: an alias for Reg<PRR_SPEC>