Module attiny_hal::pac::fuse::low

No Description.

Structs

• LOW_SPEC
  No Description.
• R
  Register LOW reader
• W
  Register LOW writer

Enums

• SUT_CKSEL_A
  Select Clock source

Type Aliases

• CKDIV8_R
  Field CKDIV8 reader - Divide clock by 8 internally
• CKDIV8_W
  Field CKDIV8 writer - Divide clock by 8 internally
• CKOUT_R
  Field CKOUT reader - Clock output on PORTB4
• CKOUT_W
  Field CKOUT writer - Clock output on PORTB4
• SUT_CKSEL_R
  Field SUT_CKSEL reader - Select Clock source
• SUT_CKSEL_W
  Field SUT_CKSEL writer - Select Clock source