Enum attiny_hal::pac::fuse::low::SUT_CKSEL_A

#[repr(u8)]
pub enum SUT_CKSEL_A {
    EXTCLK_6CK_14CK_0MS = 0,
    PLLCLK_1KCK_14CK_4MS = 1,
    INTRCOSC_8MHZ_6CK_14CK_0MS = 2,
    INTRCOSC_6MHZ4_6CK_14CK_64MS = 3,
    WDOSC_128KHZ_6CK_14CK_0MS = 4,
    EXTLOFXTAL_1KCK_14CK_0MS = 6,
    EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1 = 8,
    EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS = 9,
    EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1 = 10,
    EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS = 11,
    EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1 = 12,
    EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS = 13,
    EXTXOSC_8MHZ_XX_258CK_14CK_4MS1 = 14,
    EXTXOSC_8MHZ_XX_1KCK_14CK_65MS = 15,
    EXTCLK_6CK_14CK_4MS1 = 16,
    PLLCLK_16KCK_14CK_4MS = 17,
    INTRCOSC_8MHZ_6CK_14CK_4MS = 18,
    WDOSC_128KHZ_6CK_14CK_4MS = 20,
    EXTLOFXTAL_1KCK_14CK_4MS = 22,
    EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS = 24,
    EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS = 25,
    EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS = 26,
    EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS = 27,
    EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS = 28,
    EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS = 29,
    EXTXOSC_8MHZ_XX_258CK_14CK_65MS = 30,
    EXTXOSC_8MHZ_XX_16KCK_14CK_0MS = 31,
    EXTCLK_6CK_14CK_65MS = 32,
    PLLCLK_1KCK_14CK_64MS = 33,
    INTRCOSC_8MHZ_6CK_14CK_64MS = 34,
    INTRCOSC_6MHZ4_6CK_14CK_4MS = 35,
    WDOSC_128KHZ_6CK_14CK_64MS = 36,
    EXTLOFXTAL_32KCK_14CK_64MS = 38,
    EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS = 40,
    EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1 = 41,
    EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS = 42,
    EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1 = 43,
    EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS = 44,
    EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1 = 45,
    EXTXOSC_8MHZ_XX_1KCK_14CK_0MS = 46,
    EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1 = 47,
    PLLCLK_16KCK_14CK_64MS = 49,
    INTRCOSC_6MHZ4_1CK_14CK_0MS = 51,
    EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1 = 56,
    EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS = 57,
    EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1 = 58,
    EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS = 59,
    EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1 = 60,
    EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS = 61,
    EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1 = 62,
    EXTXOSC_8MHZ_XX_16KCK_14CK_65MS = 63,
}

Select Clock source

Value on reset: 0

Variants

EXTCLK_6CK_14CK_0MS = 0

0: Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms

PLLCLK_1KCK_14CK_4MS = 1

1: PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms

INTRCOSC_8MHZ_6CK_14CK_0MS = 2

2: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms

INTRCOSC_6MHZ4_6CK_14CK_64MS = 3

3: ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms

WDOSC_128KHZ_6CK_14CK_0MS = 4

4: WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms

EXTLOFXTAL_1KCK_14CK_0MS = 6

6: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms

EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1 = 8

8: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS = 9

9: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1 = 10

10: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS = 11

11: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1 = 12

12: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS = 13

13: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

EXTXOSC_8MHZ_XX_258CK_14CK_4MS1 = 14

14: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

EXTXOSC_8MHZ_XX_1KCK_14CK_65MS = 15

15: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

EXTCLK_6CK_14CK_4MS1 = 16

16: Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms

PLLCLK_16KCK_14CK_4MS = 17

17: PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms

INTRCOSC_8MHZ_6CK_14CK_4MS = 18

18: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms

WDOSC_128KHZ_6CK_14CK_4MS = 20

20: WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms

EXTLOFXTAL_1KCK_14CK_4MS = 22

22: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms

EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS = 24

24: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS = 25

25: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS = 26

26: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS = 27

27: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS = 28

28: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS = 29

29: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

EXTXOSC_8MHZ_XX_258CK_14CK_65MS = 30

30: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

EXTXOSC_8MHZ_XX_16KCK_14CK_0MS = 31

31: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

EXTCLK_6CK_14CK_65MS = 32

32: Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms

PLLCLK_1KCK_14CK_64MS = 33

33: PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms

INTRCOSC_8MHZ_6CK_14CK_64MS = 34

34: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms

INTRCOSC_6MHZ4_6CK_14CK_4MS = 35

35: ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms

WDOSC_128KHZ_6CK_14CK_64MS = 36

36: WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms

EXTLOFXTAL_32KCK_14CK_64MS = 38

38: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms

EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS = 40

40: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1 = 41

41: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS = 42

42: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1 = 43

43: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS = 44

44: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1 = 45

45: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

EXTXOSC_8MHZ_XX_1KCK_14CK_0MS = 46

46: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1 = 47

47: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

PLLCLK_16KCK_14CK_64MS = 49

49: PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms

INTRCOSC_6MHZ4_1CK_14CK_0MS = 51

51: ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms

EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1 = 56

56: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS = 57

57: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1 = 58

58: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS = 59

59: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1 = 60

60: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS = 61

61: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1 = 62

62: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

EXTXOSC_8MHZ_XX_16KCK_14CK_65MS = 63

63: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

Trait Implementations

impl Clone for SUT_CKSEL_A

fn clone(&self) -> SUT_CKSEL_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for SUT_CKSEL_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq for SUT_CKSEL_A

fn eq(&self, other: &SUT_CKSEL_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for SUT_CKSEL_A

impl Eq for SUT_CKSEL_A

impl StructuralEq for SUT_CKSEL_A

impl StructuralPartialEq for SUT_CKSEL_A