Type Alias SUT_CKSEL_W

pub type SUT_CKSEL_W<'a, REG> = FieldWriter<'a, REG, 6, SUT_CKSEL_A>;

Field SUT_CKSEL writer - Select Clock source

Aliased Type

struct SUT_CKSEL_W<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> SUT_CKSEL_W<'a, REG>

where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

pub fn extclk_6ck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms

pub fn pllclk_1kck_14ck_4ms(self) -> &'a mut W<REG>

PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms

pub fn intrcosc_8mhz_6ck_14ck_0ms(self) -> &'a mut W<REG>

Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms

pub fn intrcosc_6mhz4_6ck_14ck_64ms(self) -> &'a mut W<REG>

ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms

pub fn wdosc_128khz_6ck_14ck_0ms(self) -> &'a mut W<REG>

WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms

pub fn extlofxtal_1kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms

pub fn extxosc_0mhz4_0mhz9_258ck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

pub fn extxosc_0mhz4_0mhz9_1kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

pub fn extxosc_0mhz9_3mhz_258ck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

pub fn extxosc_0mhz9_3mhz_1kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

pub fn extxosc_3mhz_8mhz_258ck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

pub fn extxosc_3mhz_8mhz_1kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

pub fn extxosc_8mhz_xx_258ck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms

pub fn extxosc_8mhz_xx_1kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms

pub fn extclk_6ck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms

pub fn pllclk_16kck_14ck_4ms(self) -> &'a mut W<REG>

PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms

pub fn intrcosc_8mhz_6ck_14ck_4ms(self) -> &'a mut W<REG>

Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms

pub fn wdosc_128khz_6ck_14ck_4ms(self) -> &'a mut W<REG>

WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms

pub fn extlofxtal_1kck_14ck_4ms(self) -> &'a mut W<REG>

Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms

pub fn extxosc_0mhz4_0mhz9_258ck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

pub fn extxosc_0mhz4_0mhz9_16kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

pub fn extxosc_0mhz9_3mhz_258ck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

pub fn extxosc_0mhz9_3mhz_16kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

pub fn extxosc_3mhz_8mhz_258ck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

pub fn extxosc_3mhz_8mhz_16kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

pub fn extxosc_8mhz_xx_258ck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms

pub fn extxosc_8mhz_xx_16kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms

pub fn extclk_6ck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms

pub fn pllclk_1kck_14ck_64ms(self) -> &'a mut W<REG>

PLL Clock; Start-up time PWRDWN/RESET: 1K CK/14 CK + 64 ms

pub fn intrcosc_8mhz_6ck_14ck_64ms(self) -> &'a mut W<REG>

Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms

pub fn intrcosc_6mhz4_6ck_14ck_4ms(self) -> &'a mut W<REG>

ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4 ms

pub fn wdosc_128khz_6ck_14ck_64ms(self) -> &'a mut W<REG>

WD. Osc. 128 kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 64 ms

pub fn extlofxtal_32kck_14ck_64ms(self) -> &'a mut W<REG>

Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 64 ms

pub fn extxosc_0mhz4_0mhz9_1kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

pub fn extxosc_0mhz4_0mhz9_16kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

pub fn extxosc_0mhz9_3mhz_1kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

pub fn extxosc_0mhz9_3mhz_16kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

pub fn extxosc_3mhz_8mhz_1kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

pub fn extxosc_3mhz_8mhz_16kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

pub fn extxosc_8mhz_xx_1kck_14ck_0ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms

pub fn extxosc_8mhz_xx_16kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms

pub fn pllclk_16kck_14ck_64ms(self) -> &'a mut W<REG>

PLL Clock; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms

pub fn intrcosc_6mhz4_1ck_14ck_0ms(self) -> &'a mut W<REG>

ATtiny15 Comp: Int. RC Osc. 6.4 MHz; Start-up time PWRDWN/RESET: 1 CK/14 CK + 0 ms

pub fn extxosc_0mhz4_0mhz9_1kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

pub fn extxosc_0mhz4_0mhz9_16kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

pub fn extxosc_0mhz9_3mhz_1kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

pub fn extxosc_0mhz9_3mhz_16kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

pub fn extxosc_3mhz_8mhz_1kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

pub fn extxosc_3mhz_8mhz_16kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms

pub fn extxosc_8mhz_xx_1kck_14ck_4ms1(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms

pub fn extxosc_8mhz_xx_16kck_14ck_65ms(self) -> &'a mut W<REG>

Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms