Enum attiny_hal::pac::adc::admux::MUX_A

#[repr(u8)]
pub enum MUX_A {
    ADC0 = 0,
    ADC1 = 1,
    ADC2 = 2,
    ADC3 = 3,
    ADC2_ADC2_1X = 4,
    ADC2_ADC2_20X = 5,
    ADC2_ADC3_1X = 6,
    ADC2_ADC3_20X = 7,
    ADC0_ADC0_1X = 8,
    ADC0_ADC0_20X = 9,
    ADC0_ADC1_1X = 10,
    ADC0_ADC1_20X = 11,
    ADC_VBG = 12,
    ADC_GND = 13,
    TEMPSENS = 15,
}

Analog Channel and Gain Selection Bits

Value on reset: 0

Variants

ADC0 = 0

0: Single-ended Input ADC0

ADC1 = 1

1: Single-ended Input ADC1

ADC2 = 2

2: Single-ended Input ADC2

ADC3 = 3

3: Single-ended Input ADC3

ADC2_ADC2_1X = 4

4: Differential Inputs Positive ADC2 Negative ADC2 1x Gain

ADC2_ADC2_20X = 5

5: Differential Inputs Positive ADC2 Negative ADC2 20x Gain

ADC2_ADC3_1X = 6

6: Differential Inputs Positive ADC2 Negative ADC3 1x Gain

ADC2_ADC3_20X = 7

7: Differential Inputs Positive ADC2 Negative ADC3 20x Gain

ADC0_ADC0_1X = 8

8: Differential Inputs Positive ADC0 Negative ADC0 1x Gain

ADC0_ADC0_20X = 9

9: Differential Inputs Positive ADC0 Negative ADC0 20x Gain

ADC0_ADC1_1X = 10

10: Differential Inputs Positive ADC0 Negative ADC1 1x Gain

ADC0_ADC1_20X = 11

11: Differential Inputs Positive ADC0 Negative ADC1 20x Gain

ADC_VBG = 12

12: Internal Reference (VBG)

ADC_GND = 13

13: 0V (GND)

TEMPSENS = 15

15: Temperature sensor

Trait Implementations

impl Clone for MUX_A

fn clone(&self) -> MUX_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for MUX_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl PartialEq for MUX_A

fn eq(&self, other: &MUX_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for MUX_A

impl Eq for MUX_A

impl StructuralPartialEq for MUX_A