Struct attiny_hal::spi::Spi

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pub struct Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> { /* private fields */ }
Expand description

Behavior for a SPI interface.

Stores the SPI peripheral for register access. In addition, it takes ownership of the MOSI and MISO pins to ensure they are in the correct mode. Instantiate with the new method.

This can be used both with the embedded-hal 0.2 spi::FullDuplex trait, and with the embedded-hal 1.0 spi::SpiBus trait.

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where SPI: SpiOps<H, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, SCLKPIN: PinOps, MOSIPIN: PinOps, MISOPIN: PinOps, CSPIN: PinOps,

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pub fn new( p: SPI, sclk: Pin<Output, SCLKPIN>, mosi: Pin<Output, MOSIPIN>, miso: Pin<Input<PullUp>, MISOPIN>, cs: Pin<Output, CSPIN>, settings: Settings ) -> (Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, ChipSelectPin<CSPIN>)

Instantiate an SPI with the registers, SCLK/MOSI/MISO/CS pins, and settings, with the internal pull-up enabled on the MISO pin.

The pins are not actually used directly, but they are moved into the struct in order to enforce that they are in the correct mode, and cannot be used by anyone else while SPI is active. CS is placed into a ChipSelectPin instance and given back so that its output state can be changed as needed.

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pub fn with_external_pullup( p: SPI, sclk: Pin<Output, SCLKPIN>, mosi: Pin<Output, MOSIPIN>, miso: Pin<Input<Floating>, MISOPIN>, cs: Pin<Output, CSPIN>, settings: Settings ) -> (Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, ChipSelectPin<CSPIN>)

Instantiate an SPI with the registers, SCLK/MOSI/MISO/CS pins, and settings, with an external pull-up on the MISO pin.

The pins are not actually used directly, but they are moved into the struct in order to enforce that they are in the correct mode, and cannot be used by anyone else while SPI is active.

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pub fn reconfigure( &mut self, settings: Settings ) -> Result<(), Error<Infallible>>

Reconfigure the SPI peripheral after initializing

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pub fn release( self, cs: ChipSelectPin<CSPIN> ) -> (SPI, Pin<Output, SCLKPIN>, Pin<Output, MOSIPIN>, Pin<Input, MISOPIN>, Pin<Output, CSPIN>)

Disable the SPI device and release ownership of the peripheral and pins. Instance can no-longer be used after this is invoked.

Trait Implementations§

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> ErrorType for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where SPI: SpiOps<H, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, SCLKPIN: PinOps, MOSIPIN: PinOps, MISOPIN: PinOps, CSPIN: PinOps,

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type Error = Infallible

Error type.
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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> SpiBus for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where SPI: SpiOps<H, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, SCLKPIN: PinOps, MOSIPIN: PinOps, MISOPIN: PinOps, CSPIN: PinOps,

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fn flush( &mut self ) -> Result<(), <Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as ErrorType>::Error>

Wait until all operations have completed and the bus is idle. Read more
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fn read( &mut self, read: &mut [u8] ) -> Result<(), <Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as ErrorType>::Error>

Read words from the slave. Read more
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fn write( &mut self, write: &[u8] ) -> Result<(), <Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as ErrorType>::Error>

Write words to the slave, ignoring all the incoming words. Read more
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fn transfer( &mut self, read: &mut [u8], write: &[u8] ) -> Result<(), <Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as ErrorType>::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read. Read more
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fn transfer_in_place( &mut self, buffer: &mut [u8] ) -> Result<(), <Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as ErrorType>::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it. Read more
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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> FullDuplex<u8> for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where SPI: SpiOps<H, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, SCLKPIN: PinOps, MOSIPIN: PinOps, MISOPIN: PinOps, CSPIN: PinOps,

FullDuplex trait implementation, allowing this struct to be provided to drivers that require it for operation. Only 8-bit word size is supported for now.

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fn send( &mut self, byte: u8 ) -> Result<(), Error<<Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as FullDuplex<u8>>::Error>>

Sets up the device for transmission and sends the data

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fn read( &mut self ) -> Result<u8, Error<<Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> as FullDuplex<u8>>::Error>>

Reads and returns the response in the data register

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type Error = Infallible

An enumeration of SPI errors
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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Default<u8> for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where SPI: SpiOps<H, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, SCLKPIN: PinOps, MOSIPIN: PinOps, MISOPIN: PinOps, CSPIN: PinOps,

Default Transfer trait implementation. Only 8-bit word size is supported for now.

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Default<u8> for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where SPI: SpiOps<H, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>, SCLKPIN: PinOps, MOSIPIN: PinOps, MISOPIN: PinOps, CSPIN: PinOps,

Default Write trait implementation. Only 8-bit word size is supported for now.

Auto Trait Implementations§

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Freeze for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where MISOPIN: Freeze, MOSIPIN: Freeze, SCLKPIN: Freeze, SPI: Freeze,

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> RefUnwindSafe for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where CSPIN: RefUnwindSafe, H: RefUnwindSafe, MISOPIN: RefUnwindSafe, MOSIPIN: RefUnwindSafe, SCLKPIN: RefUnwindSafe, SPI: RefUnwindSafe,

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Send for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where CSPIN: Send, H: Send, MISOPIN: Send, MOSIPIN: Send, SCLKPIN: Send, SPI: Send,

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Sync for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where CSPIN: Sync, H: Sync, MISOPIN: Sync, MOSIPIN: Sync, SCLKPIN: Sync, SPI: Sync,

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> Unpin for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where CSPIN: Unpin, H: Unpin, MISOPIN: Unpin, MOSIPIN: Unpin, SCLKPIN: Unpin, SPI: Unpin,

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impl<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN> UnwindSafe for Spi<H, SPI, SCLKPIN, MOSIPIN, MISOPIN, CSPIN>
where CSPIN: UnwindSafe, H: UnwindSafe, MISOPIN: UnwindSafe, MOSIPIN: UnwindSafe, SCLKPIN: UnwindSafe, SPI: UnwindSafe,

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
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impl<W, S> Transfer<W> for S
where S: Default<W>, W: Clone,

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type Error = <S as FullDuplex<W>>::Error

Error type
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fn transfer<'w>( &mut self, words: &'w mut [W] ) -> Result<&'w [W], <S as FullDuplex<W>>::Error>

Sends words to the slave. Returns the words received from the slave
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impl<W, S> Write<W> for S
where S: Default<W>, W: Clone,

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type Error = <S as FullDuplex<W>>::Error

Error type
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fn write(&mut self, words: &[W]) -> Result<(), <S as FullDuplex<W>>::Error>

Sends words to the slave, ignoring all the incoming words