avr_device/devices/attiny85/tc1/
gtccr.rs

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1#[doc = "Register `GTCCR` reader"]
2pub struct R(crate::R<GTCCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<GTCCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<GTCCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<GTCCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `GTCCR` writer"]
17pub struct W(crate::W<GTCCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<GTCCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<GTCCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<GTCCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PSR1` reader - Prescaler Reset Timer/Counter1"]
38pub type PSR1_R = crate::BitReader<bool>;
39#[doc = "Field `PSR1` writer - Prescaler Reset Timer/Counter1"]
40pub type PSR1_W<'a, const O: u8> = crate::BitWriter<'a, u8, GTCCR_SPEC, bool, O>;
41#[doc = "Field `FOC1A` writer - Force Output Compare 1A"]
42pub type FOC1A_W<'a, const O: u8> = crate::BitWriter<'a, u8, GTCCR_SPEC, bool, O>;
43#[doc = "Field `FOC1B` writer - Force Output Compare Match 1B"]
44pub type FOC1B_W<'a, const O: u8> = crate::BitWriter<'a, u8, GTCCR_SPEC, bool, O>;
45#[doc = "Field `COM1B` reader - Comparator B Output Mode"]
46pub type COM1B_R = crate::FieldReader<u8, COM1B_A>;
47#[doc = "Comparator B Output Mode\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum COM1B_A {
51    #[doc = "0: Normal port operation, OCix disconnected"]
52    DISCONNECTED = 0,
53    #[doc = "1: Toggle OCix on Compare Match"]
54    MATCH_TOGGLE = 1,
55    #[doc = "2: Clear OCix on Compare Match"]
56    MATCH_CLEAR = 2,
57    #[doc = "3: Set OCix on Compare Match"]
58    MATCH_SET = 3,
59}
60impl From<COM1B_A> for u8 {
61    #[inline(always)]
62    fn from(variant: COM1B_A) -> Self {
63        variant as _
64    }
65}
66impl COM1B_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> COM1B_A {
70        match self.bits {
71            0 => COM1B_A::DISCONNECTED,
72            1 => COM1B_A::MATCH_TOGGLE,
73            2 => COM1B_A::MATCH_CLEAR,
74            3 => COM1B_A::MATCH_SET,
75            _ => unreachable!(),
76        }
77    }
78    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
79    #[inline(always)]
80    pub fn is_disconnected(&self) -> bool {
81        *self == COM1B_A::DISCONNECTED
82    }
83    #[doc = "Checks if the value of the field is `MATCH_TOGGLE`"]
84    #[inline(always)]
85    pub fn is_match_toggle(&self) -> bool {
86        *self == COM1B_A::MATCH_TOGGLE
87    }
88    #[doc = "Checks if the value of the field is `MATCH_CLEAR`"]
89    #[inline(always)]
90    pub fn is_match_clear(&self) -> bool {
91        *self == COM1B_A::MATCH_CLEAR
92    }
93    #[doc = "Checks if the value of the field is `MATCH_SET`"]
94    #[inline(always)]
95    pub fn is_match_set(&self) -> bool {
96        *self == COM1B_A::MATCH_SET
97    }
98}
99#[doc = "Field `COM1B` writer - Comparator B Output Mode"]
100pub type COM1B_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, GTCCR_SPEC, u8, COM1B_A, 2, O>;
101impl<'a, const O: u8> COM1B_W<'a, O> {
102    #[doc = "Normal port operation, OCix disconnected"]
103    #[inline(always)]
104    pub fn disconnected(self) -> &'a mut W {
105        self.variant(COM1B_A::DISCONNECTED)
106    }
107    #[doc = "Toggle OCix on Compare Match"]
108    #[inline(always)]
109    pub fn match_toggle(self) -> &'a mut W {
110        self.variant(COM1B_A::MATCH_TOGGLE)
111    }
112    #[doc = "Clear OCix on Compare Match"]
113    #[inline(always)]
114    pub fn match_clear(self) -> &'a mut W {
115        self.variant(COM1B_A::MATCH_CLEAR)
116    }
117    #[doc = "Set OCix on Compare Match"]
118    #[inline(always)]
119    pub fn match_set(self) -> &'a mut W {
120        self.variant(COM1B_A::MATCH_SET)
121    }
122}
123#[doc = "Field `PWM1B` reader - Pulse Width Modulator B Enable"]
124pub type PWM1B_R = crate::BitReader<bool>;
125#[doc = "Field `PWM1B` writer - Pulse Width Modulator B Enable"]
126pub type PWM1B_W<'a, const O: u8> = crate::BitWriter<'a, u8, GTCCR_SPEC, bool, O>;
127impl R {
128    #[doc = "Bit 1 - Prescaler Reset Timer/Counter1"]
129    #[inline(always)]
130    pub fn psr1(&self) -> PSR1_R {
131        PSR1_R::new(((self.bits >> 1) & 1) != 0)
132    }
133    #[doc = "Bits 4:5 - Comparator B Output Mode"]
134    #[inline(always)]
135    pub fn com1b(&self) -> COM1B_R {
136        COM1B_R::new((self.bits >> 4) & 3)
137    }
138    #[doc = "Bit 6 - Pulse Width Modulator B Enable"]
139    #[inline(always)]
140    pub fn pwm1b(&self) -> PWM1B_R {
141        PWM1B_R::new(((self.bits >> 6) & 1) != 0)
142    }
143}
144impl W {
145    #[doc = "Bit 1 - Prescaler Reset Timer/Counter1"]
146    #[inline(always)]
147    #[must_use]
148    pub fn psr1(&mut self) -> PSR1_W<1> {
149        PSR1_W::new(self)
150    }
151    #[doc = "Bit 2 - Force Output Compare 1A"]
152    #[inline(always)]
153    #[must_use]
154    pub fn foc1a(&mut self) -> FOC1A_W<2> {
155        FOC1A_W::new(self)
156    }
157    #[doc = "Bit 3 - Force Output Compare Match 1B"]
158    #[inline(always)]
159    #[must_use]
160    pub fn foc1b(&mut self) -> FOC1B_W<3> {
161        FOC1B_W::new(self)
162    }
163    #[doc = "Bits 4:5 - Comparator B Output Mode"]
164    #[inline(always)]
165    #[must_use]
166    pub fn com1b(&mut self) -> COM1B_W<4> {
167        COM1B_W::new(self)
168    }
169    #[doc = "Bit 6 - Pulse Width Modulator B Enable"]
170    #[inline(always)]
171    #[must_use]
172    pub fn pwm1b(&mut self) -> PWM1B_W<6> {
173        PWM1B_W::new(self)
174    }
175    #[doc = "Writes raw bits to the register."]
176    #[inline(always)]
177    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
178        self.0.bits(bits);
179        self
180    }
181}
182#[doc = "Timer counter control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gtccr](index.html) module"]
183pub struct GTCCR_SPEC;
184impl crate::RegisterSpec for GTCCR_SPEC {
185    type Ux = u8;
186}
187#[doc = "`read()` method returns [gtccr::R](R) reader structure"]
188impl crate::Readable for GTCCR_SPEC {
189    type Reader = R;
190}
191#[doc = "`write(|w| ..)` method takes [gtccr::W](W) writer structure"]
192impl crate::Writable for GTCCR_SPEC {
193    type Writer = W;
194    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
195    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
196}
197#[doc = "`reset()` method sets GTCCR to value 0"]
198impl crate::Resettable for GTCCR_SPEC {
199    const RESET_VALUE: Self::Ux = 0;
200}
avr_device/devices/attiny85/tc1/gtccr.rs

avr_device/devices/attiny85/tc1/
gtccr.rs
